IC693CPU367 vs IC693CPU350: Memory Upgrade, TMR Timer Fixes, and PLC Migration Guide
Upgrading a Series 90-30 control system from the IC693CPU350 to the IC693CPU367 delivers a major memory boost. However, engineers often report unexpected TMR timer behavior after a direct swap. This article explains the real cause and offers practical migration steps for industrial automation professionals.
Processor Speed and Memory: What Really Changes
Shared Clock Speed, Different Memory Class
Both the IC693CPU350 and IC693CPU367 use a 25 MHz 80386EX processor. The CPU350 provides 32 KB of fixed user memory. In contrast, the CPU367 belongs to the 240 KB memory class in the GE Fanuc Series 90-30 family. As a result, the CPU367 offers 7.5 times the user logic memory. Moreover, both units share the same 0.22 ms/K boolean scan rate. Therefore, the main upgrade benefit is memory capacity, not raw clock frequency.
Backplane Current Draw Comparison
The CPU367 draws 940 mA at 5 VDC, while the CPU350 draws 670 mA. This 270 mA difference matters in factory automation racks with tight power budgets. Engineers should verify the power supply headroom before energizing the system. In addition, always review the backplane loading for all installed modules.
Why TMR Timers Appear Faster After Replacement
The TMR Timing Anomaly Explained
The TMR instruction in Series 90-30 relies on a time base of 0.01 s, 0.1 s, or 1.0 s. This base is stored in a three-word %R register block. The CPU367 executes logic scans at the same nominal speed as the CPU350. However, the observed "faster" timer accuracy rarely comes from the processor clock. Instead, the issue usually stems from %R memory configuration mismatches or firmware-level timer resolution differences.
Memory Reallocation and Timer Register Mapping
The CPU350 provides a fixed 32 KB memory space with a 9,999-word %R limit. The CPU367 expands register memory to 240 KB, which requires a different hardware configuration profile. If the original program was migrated without updating the %R size setting, timer preset values may be misinterpreted. For example, a preset of 1000 intended as 10.0 seconds (0.01 s base) could execute as 100 seconds if the time base silently shifted to 0.1 s. In addition, the TMR accumulator continues incrementing up to 32767 in 90-30 CPUs. Therefore, a misconfigured time base produces a proportionally scaled timing error, not a true speed increase.
Practical Remediation Steps for TMR Drift
Step 1: Verify %R Memory Allocation
Engineers should first verify the %R memory allocation in the hardware configuration. The CPU367 supports up to 240 KB of user logic memory. However, the %R word count must be explicitly set to at least 9,999 words to match the legacy CPU350 environment. Moreover, document this setting for future maintenance audits.
Step 2: Review Every TMR Preset and Time Base
Review every TMR instruction's preset value and confirm the intended time base. A disciplined migration procedure prevents silent scaling errors. In addition, cross-check the program against the original CPU350 logic to catch any mismatched constants.
Step 3: Check CPU367 Firmware Revision
Check the CPU367 firmware revision before commissioning. Units shipped with firmware 10.72 or later exhibit consistent timer behavior. As a result, firmware verification should be part of every PLC migration checklist in control systems engineering.
Step 4: Consider Migrating to ONDTR Instructions
If the application demands tighter timing than the original design allowed, consider migrating critical TMR instances to the ONDTR instruction. The ONDTR provides retentive behavior and explicit reset control. Therefore, it reduces ambiguity during CPU transitions and improves long-term reliability.
Data Summary and Migration Recommendation
Key Parameter Comparison
Processor: both units use the 80386EX at 25 MHz. User memory: 32 KB fixed versus 240 KB. Boolean scan rate: 0.22 ms/K for both. %R register capacity: 9,999 words versus configurable up to 240 KB. Backplane current: 670 mA versus 940 mA at 5 VDC. Moreover, the memory expansion alone justifies the upgrade for applications with growing register demands. Nevertheless, the TMR timing discrepancy is a configuration artifact, not a hardware defect.
Author Insight: A Controlled Migration Approach
From a practical standpoint, the CPU367 upgrade is a memory story, not a speed story. In my experience, most "timer drift" complaints trace back to unvalidated %R settings. A disciplined migration procedure—validating memory settings and timer presets before runtime—eliminates the observed precision shift entirely. Furthermore, teams should treat firmware revision checks as a standard step in any PLC migration for factory automation projects.
Application Case and Solution Scenario
Water Treatment Plant Register Expansion
A water treatment facility needed more register space for trend logging and alarm history. The team replaced the CPU350 with the CPU367 and expanded %R capacity to 240 KB. However, operators initially reported faster TMR behavior. A configuration audit revealed the %R size had not been updated. After setting the %R count to 9,999 words and confirming firmware 10.72, timer behavior matched the original design. As a result, the plant gained memory headroom without timing risk.
Recommended Migration Checklist for Control Systems
First, verify the power supply budget for the extra 270 mA draw. Second, set the %R word count to match the legacy environment. Third, audit every TMR preset and time base. Fourth, confirm firmware 10.72 or later. Finally, consider ONDTR for critical timers. This checklist supports reliable PLC and DCS transitions in industrial automation projects.
Frequently Asked Questions
Does the IC693CPU367 run faster than the IC693CPU350?
No. Both CPUs use a 25 MHz 80386EX processor and share a 0.22 ms/K boolean scan rate. The real upgrade is memory capacity, which increases from 32 KB to 240 KB.
Why do TMR timers seem faster after a CPU367 swap?
The cause is usually a %R memory configuration mismatch or a silent time base shift. A preset of 1000 meant as 10.0 seconds can execute as 100 seconds if the base changes from 0.01 s to 0.1 s.
What %R word count should I set on the CPU367?
Set the %R word count to at least 9,999 words to match the legacy CPU350 environment. This step prevents timer preset misinterpretation after migration.
Which firmware revision fixes timer behavior on the CPU367?
Units shipped with firmware 10.72 or later exhibit consistent timer behavior. Always verify the revision before commissioning a migrated rack.
Should I replace TMR with ONDTR instructions?
Consider ONDTR for critical timers that need retentive behavior and explicit reset control. This reduces ambiguity during CPU transitions in Series 90-30 systems.
Contact Information
Inquiries: sales@nex-auto.com | +86 153 9242 9628
Partner NexAuto Technology Limited: https://www.nex-auto.com/
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